A semiconductor device used with a high frequency band, for example, a microwave power amplifier, is composed of active elements, such as a field effect transistor, and passive elements, such as resistance and a capacitor, and circuit elements, such as a microstrip line for transmitting a high frequency signal.
These circuit elements are formed, for example on the semi-insulating substrate. An earth electrode is formed on the backside of the semi-insulating substrate. And when earthing the circuit element, the circuit element provided on the semi-insulating substrate and the earth electrode formed on the back side of the semi-insulating substrate are electrically connected through the VIA hole which passes through the semi-insulating substrate, for example.
A VIA hole has a structure which provides a hole passed through from one surface of the semi-insulating substrate to the surface of another side, and forms the earth electrode in the internal wall surface of the VIA hole. The VIA hole is formed, for example by etching, and the earth electrode is formed by plating, vacuum evaporation, etc. The VIA hole of the configuration described above has some which are described in Patent Literature 1, Patent Literature 2, etc.    Patent Literature 1: Japanese Patent Application Laying-Open Publication No. H02-288409.    Patent Literature 2: Japanese Patent Application Laying-Open Publication No. 2001-28425.
FIG. 7 shows a schematic configuration of the semiconductor device according to a conventional example, FIG. 7(a) shows a plane pattern configuration diagram, and FIG. 7(b) shows a schematic perspective diagram near a small caliber VIA hole 30 formed for the source terminal electrode 18.
As shown in FIGS. 7(a) and (b), as for the semiconductor device according to the conventional example, on a semiconductor chip 10, a gate electrode, a source electrode, and a drain electrode have a plurality of fingers, the plurality of fingers are connected for every gate electrode, source electrode, and drain electrode, and the electrode for terminals is formed. The part into which the gate electrode, the source electrode, and the drain electrode have the plurality of finger shape forms an exothermic unit 16, as shown in FIG. 7 (a). In the example of FIG. 7(a), gate terminal electrodes 14, 14-1, 14-2, 14-3, and 14-4 and source terminal electrodes 18, 18-1, 18-2, 18-3, 18-4, and 18-5 are placed on a terminal of one side, and a drain terminal electrode 12 is placed on a terminal of another side.
Near the surface of a semi-insulating substrate 11, an active layer is formed on the semi-insulating substrate 11 under the gate electrode, the source electrode, and the drain electrode. The active layer forms the exothermic unit 16.
The semiconductor device according to the conventional example forms the small caliber VIA hole 30 for the source terminal electrodes 18, 18-1, 18-2, 18-3, 18-4, and 18-5 near the active layer.
In addition, the gate terminal electrodes 14, 14-1, 14-2, 14-3, and 14-4 are connected to a surrounding semiconductor chip 22 via a bonding wire etc., and the drain terminal electrode 12 is also connected to a surrounding semiconductor chip 24 via a bonding wire etc. Moreover, for the source terminal electrodes 18, 18-1, 18-2, 18-3, 18-4, and 18-5, as shown in FIG. 7(b), the small caliber VIA hole 30 is formed from the back side of the semi-insulating substrate 11, and an earth conductor 26 is formed on the back side of the semi-insulating substrate 11. And when earthing the circuit element, the circuit element provided on the semi-insulating substrate 11 and the earth conductor 26 formed on the back side of the semi-insulating substrate 11 are electrically connected through the small caliber VIA hole 30 which passes through the semi-insulating substrate 11.
The earth conductor 26 via the small caliber VIA hole 30 according to conventional technology is connected to the source terminal electrode 18 through the conductive layer (not shown) formed in an internal wall surface 30a of one step of small caliber VIA hole 30 of conical shape, as shown in FIG. 7(b).
Furthermore, the miniaturization of the small caliber VIA hole 30 is further performed with the miniaturization of the source terminal electrodes 18, 18-1, 18-2, 18-3, 18-4, and 18-5. Although it did not become a problem in the semiconductor chip with thin thickness of the semi-insulating substrate 11, since the length of the small caliber VIA hole 30 amounts also to 100 micrometers, it is impossible to ignore the inductance in GaN HEMT which applies as the substrate SiC in which it is difficult to apply a thin layer.
Moreover, if the small caliber VIA hole 30 is applied into a major diameter to directly under the exothermic unit 16 region, it becomes a cause which obstructs diffusion of heat by the cavity area.
Furthermore, in the conventional semiconductor device, the small caliber VIA hole 30 is formed, for example by etching, and the conductive layer formed in the internal wall surface of the small caliber VIA hole 30 is formed by methods, such as plating and vacuum evaporation. However, when forming the conductive layer in the internal wall surface of the small caliber VIA hole 30, the so-called disconnection caused by step by which the metal which performs plating and vacuum evaporation is not fully formed, and the conductive layer is not formed in a part of internal wall surface of the small caliber VIA hole 30 may occur. As a result, earthing of the circuit element becomes insufficient and it becomes a cause by which the electrical characteristics of the semiconductor device for microwave power amplification, etc. deteriorated.
The object of the present invention is to provide a semiconductor device which suppresses the inductance of the source terminal electrode connected to the earth electrode by using a small caliber VIA hole near the active layer, connecting with a surface electrode in minute size, and extending a caliber near the earth conductor, and a fabrication method for the same.
Furthermore, the object of the present invention is to provide a semiconductor device which improves the efficiency of heat dissipation without extending the cavity area by the VIA hole directly under the heating region by performing eccentricity of the large caliber VIA hole to the outside of the semiconductor chip, and a fabrication method for the same.
Furthermore, the object of the present invention is to provide a semiconductor device which solves the above-mentioned fault and prevents the disconnection caused by step of the VIA hole, etc., and a fabrication method for the same.